Techniques To Facilitate the Understanding of Inter-process Communication Traces

High Performance Computing (HPC) systems play an important role in today’s heavily digitized world, which is in a constant demand for higher speed of calculation and performance. HPC applications are used in multiple domains such as telecommunication, health, scientific research, and more. With the emergence of multi-core and cloud computing platforms, the HPC paradigm is quickly becoming the design of choice of many service providers. HPC systems are also known to be complex to debug and analyze due to the large number of processes they involve and the way these processes communicate with each other to perform specific tasks. As a result, software engineers must spend extensive amount of time understanding the complex interactions among a system’s processes. This is usually done through the analysis of execution traces generated from running the system at hand. Traces, however, are very difficult to work with due to the overwhelming size of typical traces. The objective of this research is to present a set of techniques that facilitates the understanding of the behaviour of HPC applications through the analysis of system traces. The first technique consists of building an exchange format called MTF (MPI Trace Format) for representing and exchanging traces generated from HPC applications based on the MPI (Message Passing Interface) standard, which is a de facto standard for inter-process communication for high performance computing systems. The design of MTF is validated against well-known requirements for a standard exchange format. The second technique aims to facilitate the understanding of large traces of inter-process communication by automatically extracting communication patterns that characterize their main behaviour. Two algorithms are presented. The first one permits the recognition of repeating patterns in traces of MPI (Message Passing Interaction) applications whereas the second algorithm searches if a given communication pattern occurs in a trace. Both algorithms are based on the n-gram extraction technique used in natural language processing. Finally, we developed a technique to abstract MPI traces by detecting the different execution phases in a program based on concepts from information theory. Using this approach, software engineers can examine the trace as a sequence of high-level computational phases instead of a mere flow of low-level events. The techniques presented in this thesis have been tested on traces generated from real HPC programs. The results from several case studies demonstrate the usefulness and effectiveness of our techniques

Verification and validation in systems engineering : application to UML 2.0 activity and class diagrams

The increasing complexity of industrial systems requires more efforts to be invested in the process of system verification and validation. The quality of such systems depends on the different types of techniques that are used to verify and ensure their correct functionality. The cost of maintaining systems in the latter phases of development is usually very high and may lead in most of the cases to inefficient solutions. Therefore, checking the correctness and validity of systems early in the design phase is greatly desirable. Different verification and validation techniques such as those involving testing and simulation are helpful and useful but may lack in many cases the desired level of rigor and completeness. Moreover, these conventional techniques are generally costly, laborious and time consuming. Conversely, using formal techniques, such as model-checking and program analysis along with design metrics complementary to the conventional verification techniques provides an elevated level of confidence since they are based on theoretical foundations. Systems Engineering is an interdisciplinary approach that aims to enable the successful realization and deployment of complex systems. Many modeling languages emerged in the systems engineering arena in order to provide the means for capturing and modeling of system's specifications and requirements. The most prominent languages are Unified Modeling Language (UML) 2.0 and Systems Modeling Languages (SysML). Formal verification and software engineering techniques can be applied in order to assess the correctness of different diagrams belonging to the aforementioned modeling languages. This research work presents a unified paradigm for the verification and validation of software and systems engineering design models expressed in UML 2.0 or SysML. The proposed paradigm relies on an established synergy between three salient approaches, which are model-checking, program analysis, and software engineering technique